OREANDA-NEWS. April 06, 2015. Soft Machines Inc., a Silicon Valley-based semiconductor startup company, today announced the Soft Machines VISC™ architecture. The VISC architecture is a breakthrough in microprocessor performance-per-watt scaling and will significantly improve performance and power for all segments of the computing ecosystem. The VISC architecture has been developed in response to single-core frequency and power-scaling issues and multi-core programming challenges.

“I believe VISC ushers in the third wave of computer architecture,” stated Soft Machines co-founder, vice chairman and CEO Mahesh Lingareddy. “We’ve been quietly building the company and developing the VISC architecture for more than seven years. Now that we have working silicon proving the invention, the time to unveil our breakthrough has arrived, and I could not be more excited. We have also proven that you can still build successful semiconductor startup companies and create value with the right vision, technology, team and investors.”

The VISC architecture is based on the concept of “virtual cores” and “virtual hardware threads.” This new approach enables dynamic allocation and sharing of resources across cores. Microprocessors based on CISC and RISC architectures make use of “physical cores” and “software threads,” an approach that has been technologically and economically hamstrung by transistor utilization, frequency and power-scaling limitations. The VISC architecture achieves 3–4 times more instructions per cycle (IPC), resulting in 2–4 times higher performance per watt on single- and multi-threaded applications. Moreover, VISC uses a light-weight “virtual software layer” that makes VISC architecture applicable to existing as well as new software ecosystems.

“We founded Soft Machines with the mission of reviving microprocessor performance-per-watt scaling. We have done just that with the VISC architecture, marking the start of a new era of CPU designs,” said Soft Machines co-founder, president and CTO Mohammad Abdallah. “CPU scaling was declared dead when the power wall forced CISC- and RISC-based designs into multi-core implementations that require unrealistically complex multi-threading of sequential applications. The VISC architecture solves this problem ‘under the hood’ by running virtual hardware threads on virtual cores that far exceed the efficiency of software multi-threading.”

The VISC architecture scales by changing the number of virtual cores and virtual threads. This approach provides a single architecture capable of addressing the needs of applications spanning from the Internet of Things (IoT), to mobile, and to data center markets.

“Soft Machines’ VISC architecture takes a big step forward in solving the most critical problem in CPU design today: single-thread performance,” commented Linley Gwennap, principal analyst of The Linley Group. “By shifting the burden to hardware, VISC aims to deliver the benefits of multi-threading to all applications.”

Mohammad Abdallah will present the VISC™ architecture overview today at the Linley Processor Conference in Santa Clara. The company will also demonstrate a dual virtual core VISC system-on-chip (SoC) prototype, showcasing the IPC improvement.

“It’s pleasure to know that the Russian school of system programming is one of the best in the world. A very strong team capable of solving the most complex problems was created during the last 5 years. SMWare engineers developed virtual software layer on VISC-architecture to cover a large part of the global microprocessor market,” said Alexander Drozdov, general director of SMWare. “Participation of Russian specialists in a project of such level, of course, strengthens the position of domestic microelectronics, contributing to the creation of technology base and talents for revival of the semiconductor industry which is the basis of any other hi-tech industry all over the world.”